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Nanomanufacturing

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About This Course

We are all too familiar with our iPhones, iPads, and other smartphones and tablets that we use every day. Have you ever wondered what are the chips and components inside them? how much they cost? And how they are manufactured? In this course we will learn about ‘Nanomanufacturing’ which is the underlying technology to make the different semiconductor chips and components that enable these devices.

We will ponder upon issues like: how the post-PC era is changing the semiconductor industry? What’s ailing Moore’s law? I will combine my experience from teaching this course at Stanford and my work in the industry to make you aware of the ‘state of art’ in the semiconductor and display industry. We will have lots of fun too! I will take you on field trips where you can check out some of the action with me.

What we will cover in each of the 6 weeks is described in more details below; if that piques your interest, please sign up. I look forward to seeing you in class!

What topics will be covered each class ?

Here are the topics to be covered in each class

Week 1: LCD and OLED Displays
We will detail on the nanomanufacturing steps involved in making a start of art LCD/TFT display. We will answer questions like why making high resolution displays such as Apple’s retina display requires moving all the circuitry to the back? What’s needed to make a display which is readable in sunlight? To reduce its power consumption? We will also cover the new technologies like: OLEDs, oxide based transistors etc. that point to a BRIGHT future in the field of display technology.

Week 2: Lithography and Patterning
Lithography is the most expensive part of fabricating a chip today and many believe that it might be the Achilles’ heel which brings to an end the cost saving achieved by Moore’s law. Moreover the way we achieve smallest feature sizes using a given lithography source is continuously changing. In this part we will discuss evolutionary solutions such as double patterning, quad patterning, and things on the horizon such as EUV, and also revolutionary solutions such as direct printing, self-assembly etc.

Week 3: Process Technology and Moore's Law
We will spend time on developing the fundamentals of process technology and how the different process steps are combined together to make a logic or a memory chips. We will classify the processes as additive vs. substantive and also as line-of-sight vs. conformal. We will also look at Moore's law and see what is ailing it today.

Week 4: FinFETs
In this section we will discuss the various nanomanufacturing steps involved in making a start of art microprocessor. Process technology for FinFETS will be described.

Week 5: Flash memory
We will discuss the various nanomanufacturing steps involved in making a start of art flash memory chips which are ubiquitous in smartphones, tablets and solid state drives today. Discuss recent trends such as 3D NAND etc.

Week 6: Packaging and 3D ICs
We will discuss the advantages and challenges of integrating chips made using different processes and achieving different functionality into a single monolithic package. We will explain how nanomanufacturing technology is enabling things like interposers (2.5D), through silicon via (TSV), microbump etc.

Please note

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Frequently Asked Questions

Will I get a statement of accomplishment after completing this class??

Yes. Students who successfully complete the class will receive a statement of accomplishment

What is the format of the class?

The class will consist of screencast videos (read Khan Academy style videos), which are usually between eight and thirteen minutes each. Many of these will contain integrated quiz questions. I prefer to not use slides in my videos, and most of them are unscripted and minimally produced.

Is there a project involved?

Yes, there is a cool project as part of the class. The project will involve making a video (similar to the ones you see as part of the course). You will submit a link to the video which will be graded by your peers. We will post of list of topics from which you can chose from for the video or you can chose a topic of your interest as long as it has some co-relation with the course.

Do I need to buy a textbook for the course?

No, since the course covers contemporary topics and recent advances in the field of nanomanufacturing we won't be following any one book in particular. We will supplement the class videos with web links, articles and white papers, when needed. We have also supplemented the screencast videos with field trips, guest lectures and videos from other sources to give you a comprehensive picture of the topic.

Do I need to know a lot about semiconductors or process technology or electronics industry to take this course?

No, we have designed the course to be pretty broad such that minimal prior knowledge is required. An enthusiasm for electronics and gadgets is must though!

What is the coolest thing I'll learn if I take this class?

Among other things, You will know why a 16GB iPhone / iPad are more value for money as compared to a 32GB model. You will have a better understanding of the display, chips and other components that go inside your smartphone / tablet.

How much time I am expected to spend on the course?

3 – 4 hours per week.

Course Staff

Aneesh Nainani

Aneesh Nainani was born in Rajasthan, India. He received his B.Tech and M.Tech degrees in electrical engineering from the Indian Institute of Technology Bombay and Ph.D. degree in electrical engineering from Stanford University. He has worked with CEA-LETI, IBM, SEMATECH, and Applied Materials. He is currently a Senior Technologist with Applied Materials in Santa Clara, CA, and also holds an Assistant Professor (Consulting) appointment at Stanford University.

His research interests are in the physics, technology and economics of semiconductors and nanoscience. More recently he has been tinkering with digital education and content delivery. He is a firm believer in Minimally Invasive Education.

He has published more than 50 papers on nanocrystal flash memory, III-V CMOS, and thin-film solar cells. Aneesh was a recipient of several awards, including the Intel PhD Fellowship, the School of Engineering Fellowship from Stanford University, and the National Talent Scholarship from the Government of India.

WWW: stanford.edu/~nainani

Muneeb Ahmed

Course Assistant